Design Of 8-bit Low Power Consjmptio ADC

ADC can realize the function of that analog signals are converted to digital signals.ADC can convert continuously variable analog signals to digital signals discrete variables.It is the link between the analog part and the digital part of a chip.Using CMOS process,more and more SOC are integrated with the mixed mode.Both of the good performance and the digital systems compatibility of the A/D converter have get more and more attention.This aspect of the research is increasingly important.At present,SAR application is widely used in the structure of 5Msps digital analog converter in the design of high resolution ADC.This structure has the advantages of small area and low power consumption compared with FLASH ADC and Pipelined ADC.This thesis mainly studies the design and implementation of 8-bit low power ADC based on SAR structure.The ADC has the characteristics of fast speed,low power consumption.The key technical difficulties of this project is high precision DAC design and high precision comparator design.In the design of high precision DAC,the segmented capacitor is adopted,which has the advantages of small area and high precision.In the design of the fast reactor,the NP parallel structure is adopted to achieve higher gain and precision.This design of mixed analog digital 8-bit SAR ADC is based on smic40 nmLL mixed CMOS process,with 1.8V analog supply and 1.1V digital supply,with the expected design target of 1Msps,5mV minimum resolution,and 1mW power consumption,the application has been realized with an area consumption of 150umX150 um.