Optimized Implementation Of SHA Series Functions On Reconfigurable Computing Platform

In recent years,with the popularity and widespread using of the Internet,whether online shopping,online bank,send and receive e-mail,or in other sensitive to security requirements of digital communication field,encryption technology has become an important tool to ensure data transmission privacy.For such problems,the U.S.National Institute of Standards and Technology(NIST)and the U.S.National Security Agency(NSA)have announced the SHA-1,SHA-224,SHA-256,SHA-384 and SHA-512 algorithm.High performance computing speed constantly refreshes the record,bringing a surprise to people,but at the same time,the disappointing fact also follows: with scientists continuously improving the performance of computer system,the energy consumption of the system becomes more and more big,which greatly reduces the computer application efficiency.In recent years,high-performance computing has turned to high productivity computing,which has become the development trend of high-end computing.More and more scholars devote themselves to the research of reconfigurable computing platforms.Hash encryption algorithm is widely used in the field of message authentication,digital signature,password security and so on.In recent years,there are a lot of researches on the hardware implementation of hash encryption algorithm,but most of the researches have only designed and implemented a kind of hash encryption algorithm.However,different environments have different requirements on the security strength of hash algorithm,which may need to be switched between different algorithms.If the use of different hardware circuit to achieve,not only waste resources,but also reduce the work efficiency.In addition,low power consumption,high performance,small area is the development trend of today's encryption chip.In view of the above problems,this paper deeply analyzes the similarities and differences of three kinds of hash algorithms of SHA-1,SHA-256 and SHA-512,and adopts the idea of reconfigurable computing,combining with the characteristics of FPGA structure,launched by the following parts: 1.In this paper,on the basis of summing up and summarizing three kinds of hash algorithms and modules,the reconfigurable design of SHA-1,SHA-256 and SHA-512 three hash encryption algorithms,such as message expansion module,iterative compression module and so on,is given.2.This paper designs the hardware structure of SHA-1,SHA-256 and SHA-512 three hash algorithms.With full pipeline architecture,the addition operation is optimized in the critical path,achieving high throughput,and the three algorithms of SHA-1,SHA-256 and SHA-512 can be implemented flexibly.3.Randomly selecting an encrypted SHA-1 file,the password cracking experiment is performed on the reconfigurable component and the general server.The speed and power consumption are recorded,and the corresponding performance ratio is calculated.The experimental results show that the performance ratio of the reconfigurable component is higher than that of the general server.