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Dynamically Reconfigurable Simulation Platform For 3D NoC Based On Multi-FPGA

Posted on:2015-10-20Degree:MasterType:Thesis
Country:ChinaCandidate:T ZhengFull Text:PDF
GTID:2308330479476268Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Three Dimension Network-on-Chip(3D NoC) is motivated to achieve better communication performance than Two Dimension Network-on-Chip. Since the architectures and design methods of 3D NoC are much more complex, to evaluate the performance of 3D NoC accurately and efficiently, importance is obvious to develop a dynamic reconfigurable simulation platform for 3D No C based on multi-FPGA.This paper proposed the system modeling scheme of 3D NoC, by researching the structural properties of 3D NoC and analyzing the performance evaluation indicators. The proposed modeling scheme extracted topology, router structure, routing algorithm, network links and traffic pattern, etc, 5 kinds of parameters to describe resource nodes, router nodes, network interface and network links, etc, 4 functional modules of 3D NoC. A dynamic reconfigurable simulation platform for 3D NoC, RcEF3 Ns, was built out to deal with the disadvantage of most existing simulation platform for NoC. By dividing 3D NoC into horizontal layers and vertical crossbar, which would be constructed in different FPGA, 2 kinds of reconfigurable components, R-Cell and TCM, were designed to support reconfigurable modeling of 3D NoC. Researchers can input and modify design of 3D NoC, and analyze the simulation results on a graphical configuration software interface on PC. RcEF3 Ns, implemented on DNV6F6 PCIe board, is flexibility in configuration, scalable and efficient with high speed over 10 times when comparing to other hardware-based simulation platforms.At the same time, this paper also proposed a design method of thermal-traffic aware and high performance 3D NoC-Bus architectures, on the analysis of multiple different topology of 3D NoC. DFSB was constructed in 3D NoC-Bus, instead of traditional vertical links, to manage the vertical communication transaction. TFSP cooperated with HAAR, for the temporal and spatial management separately, throttling and guiding the data flow in the network to balance thermal and traffic distribution of 3D NoC. This novel dynamic thermal management can improve 24.5% throughput and reduce 33.1% latency of network under the certain thermal requirement.
Keywords/Search Tags:3D NoC, dynamically reconfigurable, FPGA, simulation platform, thermal-traffic aware
PDF Full Text Request
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