Study And Implementation Of Virtualized Platform For CPU/FPGA Reconfigurable System

Dynamically Reconfigurable FPGA can partially reconfigure hardware logic under operation, which has both the rapid parallel computing ability as hardware and the programmable characteristics like software. Recently, CPU/FPGA reconfigurable system has gradually been the research highlight of embedded computing field. As there is no uniform standard of reconfigurable system architectures, hardware and software tasks hybrid scheduling operation system above becomes a bottleneck in the application of reconfigurable technology.The main object of this paper is to abstract CPU/FPGA Dynamically Reconfigurable system from a view of software developer then builds up a virtual platform to support the research of hybrid Operating System. Compared to hardware system, there are many advantages of virtual platform. Firstly, virtual platform can shield the details of hardware to make developers focus on the hardware task scheduling and the management of reconfigurable resources. And then virtual platform will not be limited by any hardware constrains, which can support the parallel develop of hardware and software system. Finally, virtual platform will provide more run-time information and easy to debug and evaluate the system.This paper describes how to build up a virtual platform based on full system simulation software Simics and device description language called DML. Firstly, This paper models the prototype system from a view of software developer, abstract the time and space property of hardware task and build up a2D dynamically reconfigurable FPGA which support preemption. Different to common scheduler, hardware task scheduler needs to consider whether the reconfigurable area can accommodate the tasks. So, this paper improves and implements the management strategy. To simulate the bitstream of hardware task, C minus compiler and target machine are implemented. Then by reconstructing the code, simulate the parallel computing in the FPGA.