Research And Design Of Low-latency Video Conversion System

High-speed video codec is an electronic device which is used to compressing and encoding video signals.With the development of high-definition camera,more bandwidth of video transmission is needed.At present,the common video codec is mainly concerned with the compression,transmission and control of the video signal.They are more concern about the continuity and clarity of the video signal.As for the signal delay,the requirements are not high.And the output format is mostly standard video format,therefore in some specific occasions such as motion capture,object tracking and image processing,they are often difficult to meet the require of low latency,high rate,and the specific output formats such as single frame image.In this paper,an electronic device using FPGA for video coding and decoding is designed.The video signal is compressed and encoded by FPGA.Thanks for its parallel processing architecture and high data bandwidth,the continuous video signal can be output in the form of single frame image.Then the images are transferred to an external device for further processing,and the processed image can be decoded again and converted into a video signal and finally output to a display device.In this paper,the design scheme of high speed coding and decoding system is introduced from hardware design,FPGA chip architecture and software compression coding algorithm.This paper introduces the hardware design theory of high speed digital circuit,the characteristics of FPGA and the application of PowerPC405 in this system.For the hardware part,this article introduces the general method of high-speed digital circuit design,explained the signal integrity,the concept of power integrity and high-speed digital circuit design methods.Then the FPGA and other devices used in this system were introduced.The software part introduces the algorithm of compressing picture following the JPEG standard,and introduces the theory of JPEG coding module,and gives the module structure of coding module.Then the principle and infrastructure of the LWIP protocol for network transmission to the host computer are introduced.Finally,the hardware circuit diagram,software architecture diagram,photograph of the design and the compressed picture and parameters of the system are given.