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FPGA Implementation Of A Lossless Image Compression Algorithm JPEG-LS

Posted on:2020-05-23Degree:MasterType:Thesis
Country:ChinaCandidate:C L YouFull Text:PDF
GTID:2428330626450778Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Real-time processing of a large number of images with increasing resolution poses great challenges to the storage capacity and transmission bandwidth of the system.In the international standard of image compression,JPEG-LS has two functions of lossless compression and near lossless compression.Lossless compression has important application value in medical imaging,biometrics,satellite remote sensing and other fields.Although there are many mature solutions for software-based compression,there are generally problems such as excessive CPU resources,high power consumption,and processing speed that cannot match the interface speed.JPEG-LS lossless compression algorithm Hardware design and implementation is the key to solving these problems.This thesis studies the FPGA implementation of JPEG-LS lossless compression algorithm with engineering value.The traditional JPEG-LS encoder based on FPGA has low clock frequency and low throughput.In order to improve the clock frequency and increase the throughput rate,an improved JPEG-LS encoder is designed.The hardware design of the entire JPEG-LS encoder includes a context modeling module,a regular encoding module,a run-length encoding module,and an output module.The construction process of context causal template is optimized.On the one hand,the previous pixel causal template is used to optimize the construction process of the pixel causal template to be encoded,and on the other hand,the next pixel causal template to be encoded is constructed in the context parameter updating process.And the calculation process of the Golomb coding parameter k is optimized by a binary search method.The JPEG-LS encoder designed in this thesis is simulated by Modelsim and implemented on Xilinx FPGA.The experimental results show that the JPEG-LS encoder designed in this thesis consumes 1521 Registers and 3373 LUTs,which can achieve lossless compression of grayscale images.The maximum clock frequency is 115.1MHz,and the throughput rate is 36.8Mbps and the compression ratio is 1.9:1,which have reached the expected targets.
Keywords/Search Tags:JPEG-LS, Lossless Compression, Context Modeling, Golomb Encoding, FPGA
PDF Full Text Request
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