| As a semi-custom application specific integrated circuit(ASIC), FPGA (Field Programming Gate Array) is widely used in the peripheral circuit of very large scale integrated circuit (VSLI). Compared with full-custom ASIC, FPGA has the characteristics of faster, lower cost and more flexible. Anti-fuse FPGA is a one-time programmable FPGA with advantages of nonvolatile, high security, high reliability, anti-radiation, so it is widely used in military, aerospace and communications satellites. However, the research of anti-fuse FPGA started late in china and is far below advanced international level. At present, the demand for anti-fuse FPGA is increasing rapidly with the quick development of our country’s military, aerospace, satellite communications and other special fields, so excessive dependence on imports is absolutely inhibiting. Therefore,Anti-fuse FPGA’s research and development is important and particularly urgent. The design of the back end of anti-fuse FPGA has been studied in this thesis.Firstly, the anti-fuse technology at present is introduced, and the structure,operational principle, advantages, and disadvantages of two frequently-used anti-fuses are analyzed. And then, the process used in this anti-fuse FPGA chip is introduced. In addition, the overall structure of the anti-fuse FPGA is analyzed, which is composed of IO blocks, logic blocks, anti-fuse wire resource, clock network and other circuit parts.The thesis focuses on the design and implementation of anti-fuse FPGA’s from its back end. At first, this thesis introduces the high voltage programming pathway to anti-fuse FPGA, and then analyzes the addition devices needed in these high-voltage pathways need, which is not ready-made in the process library. And the next, this thesis designs custom devices that meet the needs for each scene of the high-voltage programming pathway, and provides the design rules of these devices. After completing the custom devices design, this thesis discusses anti-fuse FPGA full custom layout design. The anti-fuse FPGA layout wiring planning is formulated, including of power/ground,programming path, logic modules and other main parts. And then the way to solute the possible reliability problems in layout is given. And then, the layouts are integrated into a whole PCM layout, and works on tape-out. Finally, package and test plan of this chip is designed.Through hard working, an anti-fuse FPGA chip has been successfully designed and passes all test. |
