65nm ALU Full-custom Design Technology And Methodology

YHFT-DX DSP is designed with 65nm process to achieve 600MHz under the worst conditions. The CPU core performance is the key to meet the design requirements. In the background of YHFT-DX CPU core performance optimization, this paper has researched the semi-custom and full-custom combinaton design methodology, ALU full custom design and the full-custom design automation technologies. The main works in this paper are:1) The CPU core has been full optimized in RTL-level at the beginning. Its timing still can't meet the design goals. So a number of full custom modules in the data path are determined for optimizing performance.2) Adder algorithms are researched in this paper. Two improved adder algorithms are described. One has a Carry-in bit and another is a result select adder. For optimizing YHFT-DX BS unit performance, a 32-bit adder which could check saturation is designed. By simulation results, Sum can be caculated out within 330ps, while Sat 279ps. The critical paths are optimized.3) The paper research the SIMD multiplier algorithms and full custom design a 16×8 multiplier. 4 multiplier of this structure can perform four 8×8, two 16×16 or one 32×16 bit sign/unsign multiplication. The simulation results reveal that the delay of multiplier first stage is only 470ps. This completely resolves the critical paths.4) Some full-custom design automation techniques are explored. An circuit optimized script is developing for minimizing transistor size optimization time and improving design efficiency. A full-custom layout design techniques cooperated with auto routing is proposed, too. The experimental results show that this method could save 23.8% design time in case of 20% area increased. While in the iteration process, this method can save time up to more than 50%.All of the techniques mentioned in the paper are widely used in YHFT-DX CPU core optimization. The performance is improved well and design cycle is minimized. Now the design goals have achieved.