Hardware Design Of 2.5GSPS High Resolution Data Acquisition System

Nowadays,the signal characteristic is constantly developing towards the high frequency,high speed and complex small-signal field.Because high vertical resolution can help oscilloscope to capture more real and accurate waveform,more and more technology companies began to develop high resolution oscilloscope.For example,some foreign companies like Lectory and Keysight have introduced the high speed and high resolution oscilloscope products.But the domestic related research is very little.For that reason,this paper deeply studied the high speed and high resolution data acquisition system and designed the hardware platform of four channel acquisition system based on a high resolution oscilloscope platform.The main indexes are 2.5GSPS real time sampling rate,125 GSPS equivalent sampling rate,12-bit vertical resolution and trigger of 1 million times per second.The main contents of this paper are as follows:1.Clock design: According to the JESD204 B protocol,the system clock is designed to meet the requirements of ADC and FPGA.According to the definition of clock jitter,this paper deeply analyzed the influence of the high speed and high resolution data acquisition system,showed the range of clock jitter,discussed the clock scheme of the JESD204 B system,designed the peripheral circuit of the clock chip and tested the output jitter of the clock chip meets the requirements.2.ADC design: To ensure the low noise sampling,this paper guaranteed the ADC input bandwidth by the circuit design.According to the requirements of correction,it achieved ADC gain tuning.According to the internal working principle of ADC,it discussed the register configuration of test mode,and achieved the control of ADC test,link transmission,AC and DC coupling.According to the power supply requirements,it discussed the design scheme of ADC power supply.3.High-speed serial data stream transmission and reception design: According to the principle of serial data receiving by JESD204 B,the link data establishment and channel synchronization process are given.The data receiving logic module is designed,and the data is received correctly.4.Waveform data acquisition mode design: Through the way of data extraction,the seeking the most value and average,it achieved the normal acquisition,peak detection,high resolution mode and average mode.A random sampling based on high precision time measurement circuit is designed for the acquisition of high frequency repetitive signals.With the help of external memory,continuous sampling and multi segment storage and reading of the sequential sampling are realized.By actual test,the high speed and high resolution data acquisition system designed in this paper can meet the requirements of sampling rate,resolution and trigger rate,and some indicators are higher than the design requirements.