The Researon O Collaborative Mitigation Circuit NBTI-hdced Aging And Leakage Power

As the technology level of the integrated circuit enters the nanometer level, some negative effects of the device are gradually highlighted. Negative bias temperature instability (NBTI) has become one of important factors that affect the reliability and life of the integrated circuits. The long term NBTI effect can lead to the increasing delay and the decreasing speed of circuit, eventually result to the circuit malfunction. Now,the analysis and research of NBTI effect has become one of the most important task of IC design. Meanwhile, large leakage power caused by size reduction also shortens the lifespan of device Serious. So reduce the leakage power is one of the important contents in the field of low power design.The input vector control (IVC) and gate replacement (GR) technique have been used to mitigate circuit aging caused by negative bias temperature instability (NBTI),however, it will damage the optimization results based on I VC after GR. In this paper,a new input vector control and transmission gate (TG) insertion technique is proposed to minimize the NBTI-induced degradation. By this technique, the optimal input vector of these sub circuits will be searched by dynamic backtracking algorithm. Then transmission gates will be inserted to solve the potential logic conflict caused by merging sub circuits without destroying the optimization effect of IVC. Finally the optimal input vector of the target circuit combined by sub circuits will be obtained.Experimental results show that under the same experimental conditions, the improvement of delay brought by IVC and TG insertion technique is 57.74% and the area overhead is 1.69%. Compared with IVC and GR scheme, the delay improvement rate is increased by 0.67 times and the area overhead is reduced by of 0.42 times, it shows that our scheme has superior anti-NBTI effect.In this paper, the IVC and TG insertion scheme only focus on the mitigation of the NBTI effect, without considering the static leakage power consumption. In order to meet the requirements of low power consumption in integrated circuit design,Collaborative mitigation circuit NBTI and leakage power scheme is presented, based on IVC and transmission gate insertion scheme. It reduce the leakage power of the circuit on Non critical path, and cut leakage power after mitigation NBTI effect on critical path.Finally, the optimal input vector is obtained by merging the sub circuit to alleviate the NBTI effect and leakage power. Compared with IVC and GR scheme, the delay improvement rate was increased by 0.51 times with almost the same leakage power consumption. So our scheme has superiority to the mitigation of NBTI effect and the reduction of leakage power consumption.