Mechnism Study Of PSOI-LDMOS With High Breakdown Voltage

Along with the technology development of the modern society and the rapid development of the microelectronics industry,the speed of updating electronic products has become more and more fast,the semiconductor industry is also facing a higher level of development issues,at the same time,power semiconductor devices are widely used in various industries.The lateral double diffused metal oxide semiconductor field effect transistor LDMOSFET as the main component of the power semiconductor device applications,has received a lot of attention and application in recent years.Silicon on insulator LDMOS(SOI LDMOS)structure has a good separation performance and many other advantages,but also has the shortcomings such as the self heating effect.The partial silicon on insulator LDMOS structure(PSOI LDMOS)is proposed on the basis of the structure,which combines the advantages of traditional junction isolation devices and SOI devices,the substrate can sustain a part of the vertical voltage,so it can improve the breakdown voltage,and the silicon window can alleviate the inherent self heating effect of SOI structure.The first part introduces the basic structure of LDMOS,and introduces the common junction termination technique,mainly including the principle of reduced surface field(RESURF),and the principle of Double-RESURF and Triple-RESURF,which is on the basis of RESURF,field plate technology,field limiting rings technology,variation in lateral doping technology,junction termination extension technology and super junction structure.The second part first introduces the basic structure of SOI,analyzes its advantages and disadvantages,and introduces the process flow of SOI devices.Then,the breakdown principle of SOI LDMOS devices is explained,and the breakdown voltage is analyzed in the lateral and vertical direction.After that,the PSOI structure is introduced,which is based on the SOI structure,and the basic model formula is described.In the third part,dimension effect on breakdown voltage of LDMOS in PSOI technology is comprehensively studied,the maximum breakdownvoltage(BVmax)is examined under various settings of the device parameters.It is shown that there exists an optimal ratio of the window length and the silicon film thickness to obtain the highest BV for PSOI,which is equal to 6.The optimial parameters such as the length of the window and the concentration of the drift region were also studied.In the fourth part,on the basis of PSOI LDMOS,the NIS-SDD PSOI LDMOS structure with N type silicon island(NIS)and step drift region(SDD)is proposed.The distribution of the electric field is detailed analyzed in the lateral direction and the vertical direction of the device,and the function of N type silicon island and step drift region is described.Comparing the NIS-SDD PSOI LDMOS with the traditional LDMOS and the PSOI structure with the N type silicon island,the results show that the structure can significantly enhance the breakdown voltage and reduce the conduction resistance.At last,the paper summarizes the main work of this paper,and explains the significance and the shortage of work,and looks forward to the research work in the future.