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An Implementation Of Test Platform For Broadband Access Network Chip

Posted on:2016-07-07Degree:MasterType:Thesis
Country:ChinaCandidate:Y P WangFull Text:PDF
GTID:2348330503986993Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
Access network becomes the hot spot of the network application and network construction with the rapid development of communication techn ology. In order to accommodate the huge demand of broadband services, broadbandization of the access technology becomes the inevitable development trend of access network. Therefore, network chips with various function are emerged. Simultaneously, as semi-conductor technology continuously improving, the complexity and integration of broadband access network chip increases correspondingly. During the chip development process, testing is the most complex and time-consuming part. Therefore, the research and development of the testing platform for broadband access network chip becomes the hottest research currently.This article introduces the hardware and software architecture of testing platform for broadband access network chip. This article respectively researched and developed the Socket communication driver, the parser driver, the FPGA load driver and the IIC bus driver. Using the C/S framework on testing platform achieves mutual transfer of commands and files innovatively, also parses command by using parser, drives the board to test and uploads the test results to the PC. Aiming at the issue that FPGA loads slowly, the platform constructs a new FPGA passive serial loading schema. The loading speed of FPGA increases by more than 10 times. Accordingly, it improves the loading efficiency of FPGA and shorten the testing cycle of testing platform. The platform supports IIC and MDIO interface master slave testing for various network chips, which improves the testing coverage of chip IIC and MDIO bus interface. Meanwhile, it can effectively verify the defects of network chips and accelerate network chip development efficiency. To facilitate future extensions according to demand, the testing platform uses the principal architecture of chip processor and FPGA programmable logic device.The test results shows that using this platform successfully carries the design needs to full completion. This platform achieves standardization of tool equipment, platform based testing environment, baselined test case, automated test case. This testing platform for broadband access network chip has a good practical value and provides a good reference value to chip testing of other relevant areas.
Keywords/Search Tags:network chip, test platform, driver development, bus test
PDF Full Text Request
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