A 2.4GHz CMOS RF Switch And Power Amplifier Design

Nowadays, with the great development of the technology in wireless communication system, lots of new transceiver architectures and circuits emerged. The data were enabled to transport to the far area faster using smaller power consumption. The CMOS technology, which has the advantages of high integration and low cost, makes the degree of integration, the power consumption and the cost of modern wireless products have reached an unprecedented level.The Insertion Loss, Isolation and Linearity are three key performance indexes of the RF Switch, which are constrainted by each other. So how to improve the Linearity based on better Isolation is what RF CMOS switches have been faced. RF CMOS PA performance is mainly determined by the quality of linearity, output power, efficiency and other factors, so the RF CMOS PA is faced the problem of how to improve its efficiency with the higher linearity. Therefore, it is a challenge to design a high performance RF switch and PA using CMOS technology, which is also a hot research topic at home and abroad.The CMOS technology is used in this paper to design a 2.4GHz RF switch and a power amplifier. The asymmetric SPDT structure is choosed in this RF switch. AC suspension bias, feed forward capacitor technology and a double suspension CMOS process three well design method are used in this design, to improve the isolation and linearity of the switch. For the design of power amplifier, a two stage cascade structure class AB amplifier is choosed. A pre distortion technology is used by canceling its gain and phase distortion to improve the linearity of the PA. The PA is switched to two modes of operation (low and high power) by a new type of bias circuit. Then the excess power loss is reduced which can also improve the efficiency of the PA.In this paper, The design of RF CMOS transceiver switch has been taped out and tested. The test results of the design of the SPDT RF switch is as follow:In the 2.4GHz, the insertion loss of the Transmitting path is about 1.04dB, and the isolation can achieve 34.82dB, the 1dB compression point output power is about 35.58dBm. The RF CMOS PA has been completed the layout design and post-simulation. The simulation result of the power amplifier results in that in the frequency band of 2.4-2.5GHz, the maximum power gain is about 33.18dB and the 1dB compression point output power can reach 22.06dBm, and the maximum PAE about 34.55%. This 2.4GHz CMOS RF switch and PA both meet the design requirements, which make a contribution to promote the development of the Wireless Local Area Networks.