Rf Integrated Low Noise Amplifier Analysis And Design

During the last decade, mobile communication has experienced an enormous growth. CMOS technology, which has not been considered for commercial RF applications until recently, is becoming a commercially viable manufacturing option. For example, with the 90-nm CMOS technology, transit frequencies well over 100 GHz are achieved. This offers a comfortable frequency margin for RF designers. The major problems of CMOS technology at high frequencies are the low transconductance and signal loss through the conducting silicon substrate.One of the main applications of Radio frequency Integrated Circuits is for the wireless local area network (WLAN). The three popular WLAN standards in use today are based on the IEEE 802.11a, 802.11b and 802.11g specifications. The 802.11a standard, which was ratified in 1999, operates in the 5-GHz unlicensed national information infrastructure (UNII) band. The UNII band consists of two subbands: 5.15 to 5.35 GHz, and 5.725 to 5.825 GHz, which together provide a total bandwidth of 300 MHz and offer 12 nonoverlapping data channels of 20 MHz each.This thesis focuses on designing low-noise-amplifier (LNA) for the use of 5.2 GHz WLAN. The LNA design involves trade-offs between many figures of merits, such as gain, noise, power, impedance matching, stability, and linearity. The analysis of the noise and linearity performance of basic LNA topology will be detailed separated in Chapter four and five and the design procedure will be given in Chapter six. Besides, Volterra series approach was given for the analysis of the linearity of LNA considering the memory effects of the capacitors and the inductors. The LNA achieve low NF of 1.35 dB, the input-referred third order intercept point (IIP3) of 7.392 dBm, 13.8 dB gain with 14 mW power consumption. The simulation was done with Agilent EEsof Advanced Design System 2006A.