Font Size: a A A

Low Noise Low Power CMOS Radio Receivers Design For Wireless Communication

Posted on:2004-01-20Degree:MasterType:Thesis
Country:ChinaCandidate:W GuoFull Text:PDF
GTID:2168360092470587Subject:Physical Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of technology,the size of the wireless communication system is becoming more and more small and it function is becoming more and more integrated. System On a Chip (SOC) has become the main focus of the area of wireless communication. For the wireless transmitter and receiver,basically,they can be classified into two parts:the part of base band and the part of Radio Frequency (RF). In the part of base band,the main signal is digital signal,the working frequency is relatively low,and the mature technology used in the Integrated Circuit (1C) design is CMOS technology. In the part of RF,the main signal is analog signal,the working frequency is above IGHz,and the widely used technology in Radio Frequency Integrated Circuit (RFIC) design is GaAs. It is obvious that the part of RF used GaAs technology cannot be integrated with the part of base band used CMOS technology. So SOC is impossible under this circumstance. In order to realize SOC,the technologies used in both the part of base band and RF design must be the same. Since the CMOS technology used in the part of base band design is relatively very mature,it is unreasonable to change the technology of base band. Furthermore,due to development of CMOS technology,the cut frequency f\ can be more than SOGHz. So the CMOS RFIC design becomes possible.There are a lot of unsolved problems in CMOS RFIC design. This paper focuses on the issue of low noise and low power. The main research areaes are:1. The stochastic processes representing noise.2. The basic physics of MOSFET and its small-signal model.3. The main parts of RFIC:the Low Noise Amplifier (LNA),Mixer,and Phase Lock Loop (PLL). Their noise performance has been analyzed in detail. Some critical problems in RFIC design have been solved.4. The wireless channel,and its estimation of performance.5. The detailed compare of the different topologies of receiver based on the in-depth analysis of each part of RFIC. And their analysis and simulation results based ondifferent wireless communication standards are also given.The original contributions in this dissertation includeThe expression of stability factor of single MOSFET and the full explanation ofthe performance of MOSFET stability.The full noise and linearity analysis of the Low Noise Amplifier (LNA)constructed by cascode structure with source degeneration and the optimizationmethods of the two MOSFETs in this structure according to the noise andlinearity performance.The in-depth analysis of the noise in Gilbert mixer including parasiticalcapacitors,in which the mixer and LNA have been connected together and thenoise figure of mixer can be expressed explicitly as that of LNA.
Keywords/Search Tags:CMOS RFIC, Receiver, MOSFET, Low Noise Amplifier, Mixer, Phase Lock Loop, Wireless Channel
PDF Full Text Request
Related items