Cmos Rf Class C Power Amplifier Research And Design

Power amplifier (PA) is typically the most power-hungry and largest block of radio-frequency (RF) transceiver, which mainly determines the cost, the power and the size of the transceiver. In order to meet the requirements of low cost, low power and small size, RF transceiver needs a CMOS power amplifier.This thesis presents theoretical analysis, the design and the layout of RF Class C PA in CMOS technology.Firstly, the different kinds of linear power amplifiers and non-linear power amplifiers are briefly introduced. Then, using current-source Class C amplifier model, the drain current harmonics, the efficiency and the output power versus the conduction angle are presented, respectively. The design of the Class C amplifier will benefit from this theoretical work.Secondly, the limitations of the CMOS technology for power amplifiers are proposed; including the small breakdown voltage, the substrate issues and the low quality factor (Q) spiral inductor, et al.Thirdly, the design of the single-ended two-stage Class C amplifier is studied. Circuit techniques used to combat the technology limitations imposed by CMOS technology including the cascode structure, the input tuning of final stage and the passive magnification.A 2.4-GHz, 24dBm CMOS PA is designed in TSMC 0.35μm SiGe BiCMOS RF technology. The simulation results show that, the output power is 24dBm, the power gain is 24dB, and the peak power added efficiency (PAE) is 35%.