Design And Implementation Of A Lossless/Near-Lossless Image Compression System On Satellite

Image compression is one of the most important tasks of satellite data processing. This article discusses the designing and implementation of a user-oriented spaceborne image compression system. With the multispectral camera monitoring the earth in real time, the image compression system is required to have the ability of adapting to high data rate and variable frame rate. A series of research, including system scheming, hardware structure designing, fault tolerant designing, system implementation and verification, have been carried out to implement the image compression system.Based on the research task of image lossless/near lossless compression, a reasonable system design is put forward and a hardware board of high reliability is manufactured according to the camera input and the requirements of the function requirement. Also, we developed a real-time high-performance image compression circuit with high compression ratio, and it has been tested and verified.The on-satallite compression circuit is still under development, and compression algorithm and technology to tolerant Single Event Upset are both advancing forwards. The demand of the user may alter in a few years' time, which makes the need to adapt to the probabilities of adjusting the function of the system. In order to make it possible to change the function of the circuit on satellite, we developed a injection and reconfiguration system aiming to upload the configuration data to the satellite and loaded it into the FPGA remotely, thus achieving the goal of updating the circuit function from the ground.Again, in order to meet the requirements of the reliability of satellite image compression and also to improve the ability to resist single event upset, a SRAM FPGA scrubbing system is integrated to the injection and reconfiguration system mentioned above. After the study of the principle of triple modular redundancy(TMR), we research on the TMR implementation of various resources of FPGA. Based on the difference of SRAM FPGAs and FLASH FPGAs, TMR designs are carried out on both the image compression FPGA and the comprehensive controlling FPGA separately.