Design And Implementation Of On-Board Image Compression System With Interframe Lossless And Near-Lossless Method

Image lossless/near-lossless compression has the advantage of high fidelity,and it has a wide range of applications in satellite remote sensing and deep space exploration.This thesis deals with the design and implementation of lossless/near-lossless compression system for image of a satellite high frame rate remote sensing staring camera.Faced with the technical difficulties of high fidelity,hard real-time and high reliability compression,it is necessary to solve the contradiction between compression and fidelity,large demand for real-time compression resources and limited on-board resources.The intra-frame lossless/near-lossless compression ratio is generally low,and the compression ratio can be improved by utilizing the correlation between image frames.This thesis focuses on the research of image inter-frame lossless compression method,efficient computing structure of FPGA and on-board compression system.Firstly,aiming at the contradiction between image compression and fidelity,a inter-frame lossless/near-lossless integrated image compression method is proposed,based on the LOCO-3D inter-frame compression algorithm.An improved intra-frame and inter-frame predictor group is designed.The best predictor is selected adaptively through the criterion of minimizing prediction error.The integration of intra-frame and inter-frame prediction is realized,and its lossless compression ratio is increased by 60% compared with JPEG-LS.Compared with LOCO-3D,it is 18%.Secondly,aiming at the problem of real-time compression under the constraints of limited on-board resources,an efficient FPGA computing architecture of inter-frame lossless/near-lossless integrated compression is proposed,and a parallel prediction structure is designed.The delay bottleneck of contextual address conflict loop and pixel reconstruction loop is solved,and the pixel throughput is improved.It is implemented on XILINX space-level FPGA platform,and the pixel throughput is as high as 38.36 million pixels per second.Finally,according the requirements of application,a real-time image compression system based on SRAM and anti-fuse FPGA is designed.The FPGA's ability to resist single event upset is improved through the technology of dynamic refresh and triple modular redundancy.The memory's ability to resist single event upset is improved through the technology of Hamming Code and Reed-Solomon Code.The on-board image compression system has passed the function and performance tests.The average lossless compression ratio is 2.6,and the average near-lossless compression ratio is 5.3 when the near parameter is 2.The typical compression delay is 900 us for test image set with the size of 512×512×12 bits.Therefore the validity of the results in this thesis is verified.