| With the rapid development of integrated circuits, it is becoming more and more urgent to meet the demand for low power devices. In low power devices design field, Tunnel Field-effect Transistor is one of the most popular topics. The latest research shows that the manufacturing process of TFET is simple, and TFET devices can work in a very low voltage scenario. TFET devices transport carriers by band tunneling, which is different from drift diffusion working schme of tradition MOSFET. The unique structure guarantees that TFET device has a lower static energy consumption and a promising market applicability.The purpose of this dissertation is to complete the simulation of the cell characteristics based on the TFET model. The electrical characteristics of TFET device and traditional MOSFET are introduced, and the differences of the electrical conduction mechanism are compared. Then the TFET model which is made of the III-V family of heterojunction semiconductor compounds has a high performance, so it is choosed as the simulation model. The simulation objects include inverter, NAND gate, dynamic D filp-flop and so on. The simulation parameters including propagation delay, transmission time, short circuit energy consumption and static power consumption. The experimental result shows that the propagation delay of a single input in a complex logic gate is the same as a basic inverter delay. Sequential logic cells such as a dynamic D filp-flop is simulated too. It is shown that the setup time and hold time are very small. It means the D filp-flop has a good performance. At the same time, three different types of SRAM based on the TFET model are simulated, which includes Read Noise Margin and Write Noise Margin. The experiment result shows that the first and the second type of SRAM structures are not in satisfactory. After being modified on SRAM design structure, the third type obtains the best perfomance. The Read Noise Margin is about 128.1 m V and the Write Noise Margin is about 55.3 m V, which meets the demands of reading and writing stability. The simulation result theoretically proves that it is possible to use TFET structure in SRAM in place of CMOS ones.Because the characteristic parameters of the TFET cells are simulated without considering the parasitic parameters, so the dissertation can be regarded as a basic research of the TFET device model, which provides a reference for the further research on TFET devices. |
