Testbench Qualification And Stimulus Generation Techniques For Functional Verification Of Multi-core Processor

As a consequence of people’s increasing need, integrated circuit(IC) technology develops fast. As a representative product of IC, modern CPU’s scale and complexity increase along with the developing of process to achieve higher performance. However, when beyond deep sub-micrometer process, the leakage power makes it hard to improve performance by the developing of process. Therefore, multi-core processors integrate several cores to obtain better computation capacity, which makes processors’ scale larger and more complex. Along with the increasing scale and complexity, the time to market pressure is also growing, which makes the functional verification of processor become the bottleneck of the design cycle.In the environment of verification, testbench is the fundament which is critical to the quality of verification, and stimulus drive the simulation, which determine the efficiency of verification. To refine the verification environment, obtain better verification quality, and higher verification efficiency, this thesis mainly makes the following contributions:1) Mutation analysis based testbench refinement technology. By analyzing the consistency between the behavior of coverage model and checkers during mutation analysis, this technology firstly finds out insufficient parts in the most important two parts of testbench(the coverage model and the checkers), and then systematically improves the whole testbench by refining these two parts to delivery better verification quality.2) Data mining based constrained random stimulus generation technology. By using data mining technology to analyze numerous test cases and coverage results, this technology firstly extracts common properties in instruction sequences which can effectively increase the coverage results, and then reuses the extracted properties during the stimulus generation process to strengthen the stimulus’s capacity to drive coverage events we interested in and increase the coverage results. Meanwhile, this thesis proposes two technologies to refine the efficiency and quality of the data mining process. The first one is Tag based locating technology (TBLT) which easily and accurately locates useful instruction sequence in a test case. The second one is Dissimilarity based rule combination technology (DBRCT) which improves the efficiency when combining different rules.Finally, the experimental results show that the method and technologies proposed in this thesis effectively improves the quality and efficiency of functional verification.