The Functional Verification Of GMAC Bridge Circuits And Automatic Stimulus Generation

With the rapid development of integrated circuits and its functional complexity scale, there is growing concern about the efficiency and reliability of IC functional verification. Aiming at the bus-interface-type circuit, we present a modeling method for functional specification and a stimulus generation algorithm based on functional specification model. Based on the development of GMAC Bridge in FT-X DSP chip, we test the verification method. The result shows that this method can effectively improve the time efficiency and functional coverage of functional verification. The main work includes the following five points.1. We complete the design and implementation of GMAC Bridge in FT-X DSP chip. By analyzing the finite state machine used in circuit design, we obtain the maximum data transmission efficiency of GMAC Bridge and make an experimental verification where the results show that the theoretical analysis is matched with the reality.2. Considering the features of the bus-interface-type circuits, we study the characteristics and composition of the functional specification. Then, basic properties of the bus-interface-type circuits are classified and abstracted as functional points. After that, a functional verification method is proposed for the bus-interface-type circuits based on its functional specification.3. We use the higher-order logic to design a specification description language, and then describe the timing relationships of signals to achieve a formal description of the functional specification points of the bus-interface-type circuits. Then we establish a functional specification model and analyzed its integrity.4. Based on the functional specification model, we designed an effectively test vector generation method to implement the test vector generation of bus-interface-type circuits. Using functional coverage driven approach, combined with the process of simulated annealing, we design an algorithm to automatically determine whether to adopt the test vectors as stimuli and ensure the completeness of verification in this process. By using the SystemVerilog-based UVM verification methodology, we implement the test stimulus generation algorithm and achieve the verification system based on specification model.5. We model the functional specification and build verification platform for GMAC bridge circuit. Experimental results show that GMAC bridge circuit can achieve all the functional points described in the specification. When functional coverage meets 100%, it is 21.15% lesser than the stimulus produced by manual method. The results show that this method can generate efficient stimulus set.