Verification For Multi-core Processor Interconnection IP

Along with the progress of manufacturing of integrated circuits and process design level unceasing enhancement,a single core cannot meet the needs of circuit design,prompting multi-core processors become the inevitable trend of processor design research.As the design of multi-core processors is becoming more and more complex,the verification of multi-core processors is difficult,how can we find the detect existing in processor to achieve complete verification has become a urgent problem in many IC design companies.With the development of multi-core processor,the communication between cores is increasing complex,only when the correct interaction between cores is realized,can the multi-core processors work normally and achieve the correct functions.Dur to the complexity of multi-core processors system and the diversity of application acenarios,it is very important to verify the completeness of IP of multi-core interconnection inter-core communication circuit.In this paper,the communication mechanism between mupti-core processors is carefully studied,and the IP of the company's inter-core communication circuit is carefully analyzed,f inally,a complete verification scheme is proposed for this IP and analyze the comp leteness verification of this IP.Specifically,the research is mainly conducted from f ollowing aspects:Research and analysis of inter-core communication mechanism and formulation of verification plan.The IP of the inter-core communication circuit to be verified in this paper contains components to realize inter-core interaction function,and there also are complex register configuration inside each component.This paper analyzes the 7 components contained in the IP under specific configuration,makes a detailed verification plan in combination with the design document and function documents,a nd write atestcase that comprehensively covers the function points for each compo nent.A total of 42 testcases are written,and each tesrcase can be successfully compiled.Establishment,evalution and improvement of the testbench.According to the charact eristics of the processor,a verification method,which is based on coverage driven verification,is developed for the processor,and a UVM testbench with intelligent interaction is built for the function points of the IP to be verified.Certitude is used to evaluate the quality of testbench.There are 5574 faults are injected into design,and the quality score of testbench reached over 90%.Evaluation and optimization to verify completeness.there are 100 random seeds for each testcase,and obtained the 4200 testcases all compiled successfully,all through 4200 testcases has paved the way for the collection of coverage.After reached the goal of regression,collecting coverage,and first got 88.73%,after analyzing and impoving the score to 100%,finish the goal of verfication for this paper.In a word,this psper write test plans for 7 components and 42 testcases for total components,evaluate the quality of testbench and achieve the quality of 90%,and improve the structure of the testbench.large-scale regression also achieve and all 4200 testcases pass.Finally,collecting code coverage and achieve the goal of 100%.