Development Of PXI-E Bus Dedicated High-speed Signal Acquisition Module

In some radar confrontation test, in order to assess the test results accurately, it is necessary to design a high-speed acquisition system, which can acquire the radar echo signal and the pulse signal, and then analyzes the collected data. At the same time, in order to analyze the data of radar confrontation test after the fight, it provides the ability of high-capacity storage. The purpose of this thesis is to designe a PXI-E bus dedicated high-speed signal acquisition module, this module can provide the data source for radar jamming experiment’s follow-up data processing, and has important significance of improving the analysis level of the radar effect in the radar jamming experiment.At the design of hardware, FPGA was chose as the core processor, and TI’s ADS5407 was chose as the core chip, so that the module can acquire the radar echo signal of 2 channels, and the sampling rate can reach up to 500 MSPS / channel. 2-channel analog signal and 6-channel pulse signal was processed synchronously by the AD sampling clock, so that it can achieve the simultaneous acquisition of the analog signal and the pulse signal. A front-end conditioning circuit was used to condition the analog signal to meet the needs of AD’s input requirements; the circuit was also used to condition the pulse signals, so that the signals can be identified correctly by the back-end circuit. And 2 channels of external trigger signal were processed synchronously with the 6 channels of pulse signals. The selection and use of the external trigger, internal trigger and soft trigger were achieved by the FPGA logic in order to achieve the flexible capture of the signals. 2 kinds of operation modes, which are oscilloscope mode and continuous acquisition mode, were achieved by FPGA logic and DDR3 SDRAM together. Data was stored in the dual-port RAM inside the FPGA at the oscilloscope mode. The data was stored to an external DDR3 SDRAM at the continuous acquisition mode, and there are 1GBytes caches on the board. PCI Express interface technology was implemented by the FPGA with PCI Express hard core, and the DMA data transfer was implemented with the DMA controller inside the FPGA.At the design of software, NI-VISA and CVI was used to develop the PXI-E bus dedicated high-speed signal acquisition module driver. And the functional software was developed on the software platform of the Lab Windows/CVI. It provides the function of oscilloscope, which was used for radar echo signals analysis in time domain and frequency domain during the radar system commissioning, and function of continuous acquisition, which was used to store the collected data to the high-speed storage system, and provides the gates compression technique to save the storage space.Finally, the PXI-E bus dedicated high-speed signal acquisition module has been tested and verified. The input impedance, the acquisition accuracy, the acquisition speed and the dynamic performance has been tested; what’s more, the logic level of the pulse channel has been tested. The test results show that the design of hardware can meet the design requirements.