Design Of 18 Bit Cascade Delta-Sigma ADC

Delta-Sigma ADC which adopts oversampling technique and noise shaping technique,sacrifices speed for precision can satisfy the requirment of high precision analog to digital conversion.Thus Delta-Sigma ADC is widely used in high precision audio signal processing system and measuring instrument.In this paper,we take designing a 18 bit resolusion, high stability Delta- Sigma ADC as our goal.Firstly I illustrates the background,researches the situation of Delta-Sigma ADC at home and abroad,analyzes the feasibility;Then inruoduces the foundamental principles.According to the requirement of 4k SPS and 18 bit effective resolusion to determine the structure of Delta-Sigma ADC.Advantages and disadvantages of single loop and cascade are discussed,the relationship between oversampling rate,quantizer bit and the precision of the modulator is derived.The finite DC gain,bandwidth,slow rate and the non-zero turn-on resistance’s is modled to analyze the effect on the performance of modulator and as a guideline for circuit design.In order to obtain the output data at the Nyquist rate,the digital decimation filter is designed.The digital decimation filter is Multi-stage structure including CIC(cascade integrator comb) and two half band filter.So as to further reduce the are of Delta-Sigma ADC,the coefficients are encoded by Canonical Signed Digit.GF35 CMOS process is adopt to design the analog circuit including fully differential CMOS switched-capacitor integrator,comparator and two-phase non-overlap clock.Digital circuit including digital noise cancellation logic,clock division,CIC filter and halfband filter are designed.In layout level,this paper completes analog circuit layout design,logic synthesis,auto place and routing prime time analysis.The simulation results shows:The noise floor is about-135 d B,SFDR is130 d B.This design satisfies the goal.