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Design And Implementation Of The FPGA-Array-Based SDR Hardware Platform

Posted on:2015-11-04Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2308330473952975Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the continuous development of communication systems, Software Defined Radio technology is playing an increasingly important role. CPCI-based SDR technology in terms of reliability and scalability is irreplaceable. Today, there have been many teams and manufacturers to develop a SDR platform system meets CPCI standard, the technique is relatively mature.Most traditional SDR platform are based on single-chip solution such as FPGA or DSP. However, With the increasing amount of data signal processing SDR platform also needs further enhancement. Traditional SDR platform has not fully meet the requirements of modern signal processing capabilities.Therefore, this paper designed a new type of SDR platform, using 5 FPGA array as the key device components. Similarly the CPCI based architecture enables high-speed data exchange, providing a powerful signal processing capabilities. According to the design of new SDR platform, eventually develop a complete hardware platform.First, describe the current status of SDR technology and infrastructure, combined with CPCI standard, summarizes the advantages and limitations of CPCI architecture while now listed and compared the number of cutting-edge manufacturer of representative products.Then, the proposed new SDR technology functional requirements and technical specifications, based on technical indicators, largely determine the structure and function of the platform. Complete the overall design of the FPGA array SDR.Then, based on the overall design. Conducted chip selection, and then sub-module independent design, after the completion of the module, inter-module design, complete all system platform design. Also consider the thermal analysis and reliability aspects of the design.Finally, debugging and testing is to verify the circuit function, including the cold plate test, power and clock debugging, testing each module.This paper designed and implemented an FPGA array SDR hardware platform. Ability to deal with large digital signals. High reliability of this hardware platform. To meet the different needs of universities and research institutes. FPGA array SDR platform have a good application prospect.
Keywords/Search Tags:FPGA array, Software radio, High speed data cache, CPCI, Reliability
PDF Full Text Request
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