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The Realization Of High-speed Data Acquisition And Storage System Based On FPGA

Posted on:2015-09-08Degree:MasterType:Thesis
Country:ChinaCandidate:W WeiFull Text:PDF
GTID:2308330464968851Subject:Instrumentation engineering
Abstract/Summary:PDF Full Text Request
High-speed data acquisition and storage system occupies the position play a decisive role in the modern information processing system. In the modern information processing technology, mostly through the system of digital circuit configured to complete information access, processing, control and transmission of a series of work. But in the actual engineering application, the treated information is usually the temperature, humidity, pressure, radiation and other physical quantities, these physical quantities needed by all kinds of special sensor converts it into a continuous analog signal. The so-called data acquisition, refers to the continuous analog signals into digital signals for digital system can process. Therefore, data acquisition and data storage, transmission, before digital signal processing is very important step. The acquisition speed and precision of data acquisition, storage and transmission rate data obtained directly affects the performance of the whole processing system.In this paper the design and implementation of high-speed data acquisition and storage system is through the high performance ADC chip sampling data of high rate and high accuracy, these data will be used in memory cache in advance and do some processing, and then through the computer bus, the data timely, efficiently and transfer to the computer local disk falls, so as to achieve record data and is convenient for users to view and analyze the data to repeatedly. After the research and understanding of the development process and the status quo of the memory and bus technology, decided to use DDR3-SDRAM and PCI Express (PCIe) to respectively realize data cache and transmission in this system. The system is based on FPGA to carry on the design and implementation of the FPGA design flexibility and FPGA module design characteristics greatly shorten the system development time and cost, and make the system have further extended upgrade potential. Considering the difficulty of programming code and universality, used in the design of the Verilog HDL hardware description language separately on the DDR3-SDRAM interface to read and write state transition, ADC chip working mode control, data acquisition and pre-processing, PCIe bus interface data control module of the program, and through the the simulation software Isim of each function module is fully functional simulation.The simulation proved the sufficient and a lot of test and analysis, the function of the system can be realized, the performance indicators have reached the design target. To meet the data acquisition and storage system demand in the current fields of military, industry and space exploration. In this paper the design and implementation of high-speed data acquisition and storage system has great practical value and broad prospect of application.
Keywords/Search Tags:ADC, FPGA, DDR3, PCIe, Verilog
PDF Full Text Request
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