The SI And PI Analysis Of High Speed Circuit PCB

With the rapid development of modern electronic communication technology as well as rapid increase in lithography technology and packaging technology, the signal rate has inevitably increased. As integrated circuits hits the nano-level, device size has become smaller, IC has increased in scale, the number of pin has risen, clock frequency has become higher, the electromagnetic waves are long and comparable to the size of the device. Hence, increasing signal integrity problems cannot be ignored.For low-speed devices a decade ago, the transmission line can be seen as a simple piece of wire. However, for today’s high-speed devices, signal propagation shows very significant wave characteristics; that is, high-speed signal will oscillate back and forth along the transmission line. Therefore, along with the rapid development of high-speed circuits, high-speed circuit electronic devices reduced size causes the whole circuit layout to become extremely dense. In order to better handle high-speed signal problems, we must deal with several signal integrity issues.This paper shall provide a deep analysis about concepts and methodology of the signal integrity and power integrity of this high-speed circuit design, combining theory and then total cost-efficient signal integrity, power integrity simulation theory and methods. The simulation process would be conducted using software of Ansoft’s SIwave to extract packaged PCB scattering parameters. After which, the scattering parameter would be converted to the netlist file which could then be read by soft tool IDEM. The netlist file would then be linked with IBIS files as input and output interface to form a simulation model doing simulation of PDN impedance scanning and transmission line IR drop. According to the simulation results for the development of layout design, we will take an effective means to reduce the PDN impedance and voltage loss on transmission line, in order to ensure that system signal integrity can be enhanced without modifying the chip design.This high-speed hybrid PCB design method and process based on PCB signal integrity and power integrity can be used to develop and improve the constraint rules, optimize the layout and to ensure the high-speed circuit wiring design reliability. Not only does it improve the quality of the actual PCB, it shortens the design scope changes and reduces the design risk, thereby shortening today’s high speed circuit design development cycle and thus saves development costs.