Design And Analysis Of High Speed Digital Circuit Board Based On Packet Crossing Method

With the development of electronic technology and digital circuits,the frequency of digital circuits has been continuously improved,the integration of electronic products have become increasingly high,and the complexity of printed circuit board(PCB)design has increased.It is difficult to design circuit board with qualified signals.Currently,the designers of high-speed circuit board have insufficient analysis and simulation of signal integrity,and there are few studies on actual design methods.In this paper,a group crossing point method is proposed,which can quickly and reasonably determine the stacking number,guide the layout and wiring,shorten the design time,increase the success rate of the first proofing board,match the signal integrity analysis and simulation,and improve the high-speed signal quality.High-speed board designs create more problems than low-speed board designs.To ensure the correct transmission of digital signals in the printed circuit board,reducing the problems caused by signal integrity in high-speed digital circuit PCB design has become the main work in PCB design.If signal integrity issues such as reflection,ringing,delay,crosstalk,and EMI cannot be fully analyzed before design,the signal quality of the transmission line may be poor,and even the entire circuit board design may fail.High-speed circuit systems are becoming more and more complex,the design and development cycles and design costs are also increasing.Comprehensive use of signal integrity design methods can improve signal quality,shorten development cycles,and reduce R&D costs.The integrity issues in engineering design are analyzed in this paper,and there is depth analysis of transmission line model,transmission line characteristic parameters,microstrip line structure,stripline structure,etc.A grouping intersection design method and an 8-layer high-speed circuit board are proposed by controlling controllable factors.In this paper,the appropriate simulation tools are selected to simulate the impedance,coupling,DDR waveform,power supply and EMI.The signal quality meets the expected requirements.The critical signal transmission line impedance error is controlled within 10%,and the coupling coefficient between most transmission lines is controlled within 5%.DDR signal line simulation waveforms meet the voltage requirements in DDR2(AC250/DC125)standard,DC power plane voltage drop is less than 5%.The EMI 3m far-field test value of a single set of signal lines is less than the maximum radiation value required by the GB9254-2008.