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The Design Of Computer Components Principle Experiment Platform Based On Dynamic Partially Reconfigurable FPGA

Posted on:2016-04-29Degree:MasterType:Thesis
Country:ChinaCandidate:H YangFull Text:PDF
GTID:2308330461985382Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the rapid development of computers and large-scale integrated circuit manufacturing technology, modern electronic and circuit system design technology has changed. Using the traditional small-scale integrated circuit chip design methods and the connections, both time-consuming and consuming a large quantity of equipment, has been unable to meet modern electronic system design requirements. Computer simulation has become an important means of teaching students the practical ability. This paper has developed a set of computer components principle experiment system which includes PC management system and slave hardware system. The students can consolidate the principle of the computer component of the curriculum, how the various components work in CPU. It also plays an important role in enlarging the perceptual knowledge for students, training students’computer applications, such as capacity and ability to innovate.In the design and development of the host computer, the C++builder 6.0 is applied to develop a set of PC management system visual interface. The experimenter in PC management system can make simulative design and functional verification of every part of the computer component.This paper used dynamic partially reconfigurable FPGA for the slave computer design on the basis of the dynamic partially reconfigurable FPGA to do a thorough research. The hardware system of slave computer is composed by dynamic partially reconfigurable FPGA、input module、display module and clock module. The using of dynamic partially reconfigurable FPGA saved hardware circuit space usage, reduce the complexity of the hardware circuit and improve the stability of the hardware circuit. The EAPR (Early Access Partial Reconfiguration) design process was applied for the design of dynamic partially reconfigurable FPGA. Each functional module was designed and verified of salve computer. This paper realized the design of dynamic partially reconfigurable FPGA by Planahead of Xilinx Company and got a fully functional FPGA configuration file which can be used by the user. The function of host computer and slave computer was verified. Finally, the paper summarized the word and the shortcomings of paper.
Keywords/Search Tags:Computer composition principle, Dynamic partially reconfigurable FPGA, EAPR, CPU design
PDF Full Text Request
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