Research On Design Method Of Dynamic Partial Reconfigurable System And Reconfigurable Computing

With the development of digital system and the advances of productiontechnology on FPGA (Field-Programmable Gate Array), the status of the FPGA hasbeen promoted from the accessory to the core processor device in digital systems. Theappearance of the FPGA based on SRAM marks the beginning of the modernreconfigurable computing.As the digital system become increasingly complex, the designer would like tohave fewer resources to implement complex systems, and make the system designshift from the logical size to time-sharing logical resource and from the fixed logicfunction to the flexible variable logic function. And the dynamic partialreconfiguration (DPR) meets these requirements exactly. Reconfigurable computingutilizes the field-programmable features of reconfigurable device, making it combinesthe efficiency of hardware and the flexibility of software, and is the current researchhotspot in the structure of computer system areas. In the same time, the DPR has highflexibility which is important for the further development of reconfigurablecomputing. In view of the advantages of DPR, the reconfigurable computing based onDPR system is studied in this paper, to improve execution speed and resourceutilization, and to address the reconfigurable time on the system performance and soon.The content of this paper mainly consists of two parts: the design method of DPRsystem and research reconfigurable computing based on DPR system. Details are asfollows:(1) In order to design a DPR system quickly and effectively, the design methodof the DPR system is focused and the design flow is described detailly in this paperwhich is based on DPR. By comparison with existing methods, the result ofexperiment shows that the method based on EAPR (Early-Access PartialReconfiguration) and tools using PlanAhead could complete the system design ofDPR more effectively, and finally the effectiveness and convenience of the designmethod are verified by two specific examples.(2) Design a DPR system for reconfigurable computing, and propose theprocedure-level dynamic HW-SW Model and design the relevant partitioningalgorithm for the DPR system to reduce execution time of application program. TheDPR system not only can divide these functions of the application program into hardware or software at run-time according to the parameter information of thesefunctions, but also can implement dynamic reconfiguration between differentapplication programs according to the times of these functions to improve theperformance of system.(3) Aiming at the restriction of the configuration time to the performance ofreconfigurable computing, the module mapping algorithm based on DPR technologyfor sequential applications is proposed in this paper. And it is for multi-modules, andcombines with the high effectiveness and flexibility of DPR, and also hides theconfiguration time to reduce program execution time and improve systemperformance. Finally, the algorithm is verified by an application example, and theresult shows the feasibility and validity of the approach.