Research On The Fault-tolerant Design Of Digital System Based On Dynamic Partial Reconfiguration Of FPGA

Field Programmable Gate Array(FPGA)not only can have hardware circuit functions realized through software development, but also have the ability of repetitive programming and dynamic reconfiguration. The highly versatile FPGA is widely used in space probe, aerospace, remote sensing, factory control, medical treatment, communications and other fields. Dynamic Reconfigurable design based on FPGA which has attracted widespread attention of domestic and foreign scholars is the current research focus, while the research on the fault-tolerant design of system based on FPGA also has important and useful value.Reliability is the key point to guarantee normal operation of all digital systems, especially in the application of high security requirements.In this paper, we research on the fault-tolerant design of digital system based on dynamic Partial Reconfiguration of FPGA,main research work completed:(1) Establishment of overall design proposal of fault-tolerant digital system based on dynamic reconfiguration; To improve the system reliability in the harsh environment, we propose a D/TMR system design based on FPGA dynamic reconfiguration. In normal operation the DMR system is adopted with lower area costs and power, and when the system fails, FPGA dynamic reconfiguration technology is used to switch to TMR system to maintain the continuity and reliability of system functions without extra fault detection and positioning circuits.Compared with DMR and TMR systems and analysis of the reliability of the system.(2) Choose 8-3 encoder and 2- multiplier as example to verify the design,Division of the whole D/TMR system according to multi-level structures; completion of the design of each module;Establishment of the fixed bus macro communication design connections between modules; the use of newer design based on SLICE; completion of the design using FPGA Editor design tools; Completion of the design of the D/TMR system based on the encoder, using modular design process; Completion of the design proposal again using the latest EAPR design method recommended by Xilinx company, analysis of the advantages of EAPR design method;Completion of the design of the D/TMR system based on the multiplier, using modular design process, proving the feasibility of experimental results;...