.14 ​​bit 30msps Self-calibration To The Segmented Current-steering Dac Design

As one of the general analog circuits, digital to analog converter (DAC) is widly used in digital processing system. However, the dramatic development of digital peocessing technology requires higher speed, higher resolution, lower power dissapation and low supply voltage DAC. Segmented current steering DAC is almost exclusively used to achieve high speed and high resolution. But due to gradient errors, it is very difficult to design a high-accuracy 14 bit intrinsic DAC. Calibrating technique overcome the problem and relaxes the requirements on layout and process, reduce the sensitivities of DAC to process and tempreture. So calibrating technique becomes a main approach in the next generate high-speed, high-resolution DAC, especially with the feature size shrinking and supply voltage reducation. The fourth part of the paper presents a new digital self-calibrating circuit that can effectively compensate the mismatch of current source and achieve high linearity with small die size. Meanwhile, the calibration technique can significantly reduce the area of current source array, result the reducation of parasitic effects. Therefore, it can improve the DAC dynamic performance. A 14 bit 30Msps self-calibrating segmented current steering DAC is designed with 1.5V supply voltage. Thanks to the new calibration technique, the DAC occupies significantly smaller area and improves the dynamic performance than intrinsic DAC under the same design conditions.