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Study Of Frequency Divider Based On PLL Frequency Synthesizer

Posted on:2015-05-03Degree:MasterType:Thesis
Country:ChinaCandidate:N AnFull Text:PDF
GTID:2298330467489329Subject:Integrated circuit engineering
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With the rapid development of wireless communication market and CMOS technology, the study of radio frequency integrated circuit is more and more thorough. Frequency synthesizer is one of the most important parts in the RF transceiver. It can produce the vibration signal of high stable, high spectral purity from one or more reference frequency. Modern wireless communication market requires the frequency synthesizer to develop a high frequency, and phenomenon of the coexistence of multiple communication protocols on the market makes frequency synthesizer also can switch channels quickly and ensure high spectral purity. This requires the design of a high performance frequency synthesizer. PLL frequency synthesizer because of its good performance is one of the main synthesizer structures; frequency divider is the key factor affecting the performance of frequency synthesizer. Besides, an MMD is highly desired in delta-sigma fractional-N frequency synthesis.Firstly, a lot of literatures related to the frequency synthesizer were explored. Introducing several frequency synthesizers in different structures. Among them, this paper focus on the basic theory of phase locked loop frequency synthesizer as well as the building blocks. The linear model of the phase locked loop is analyzed. Contrast the advantages and disadvantages between integer frequency synthesizer and fractional-N frequency synthesizer. Then study the three divider forms, focusing on the circuit SCL structure used in this paper. Make a simple description about synchronous and asynchronous divider which is commonly used in divider structures. Introducing several simple dual modulus divider structures, and then describes three common structural forms of multi-mode divider. This paper designs a four mode frequency divider which divide ratio is16/17/20/21. This divider using TSMC (Taiwan Semiconductor Manufacturing Company)0.18μm CMOS craft, the maximum operating frequency up to1.5GHz, divide range is1.4GHz, the power consumption at maximum operating frequency is4.4mW. Finally, make performance simulations about this divider at different process corners, different supply voltages and different temperatures. And analyze the results.
Keywords/Search Tags:phase-locked loop, frequency synthesizer, multi-modulus divider
PDF Full Text Request
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