Impementation Of AVS Encoding P-frame Under On-chip Cloud Architecture

AVS standard is the second-generation video coding standard researched and developed by our country independently, using a series of advanced technology and taking both processing speed and complexity constraints into account. The coding efficiency is higher than both first-generation coding standards (including MPEG-2, AVC, etc.) by more than2times and the technical solution is more concise than H.264coding standard. AVS standard is widely adopted in such products as video telephony, HDTV, IPTV, portable digital product, mobile phone, set-top box, high-definition video players, etc. Currently, AVS has entered the industrial stage, so the utilization amount of AVS chips will dramatically increase in the next ten years.Since AVS encoder deals with large amounts of data, the computational complexity is very high and the real-time encoding requirement has to be satisfied. Based on the characteristics of reconfigurability and parallel processing of on-chip cloud architecture, a new three-layer SOA on-chip cloud architecture (requirement+semantic+service) is proposed in the paper. The components in software field are atomized and implemented as a set of instructions, the message function modules are encapsulated into atom components connected via messages which are interconnected through on-chip only-write bus; and then the basic structure of on-chip cloud is achieved. Issues within the cloud architecture including problem resolve model, the application layer language LL7(Language Level7) and on-chip bus interconnect mechanism are researched. Problem resolving model includes modeling platform and process design platform, which is the application development environment of raw chip; the application layer language LL7is defined, including field instruction set (LL7-PS) and application process engine (LL7-PI), then the scenarios are described as semantic processes and loaded into the engine for execution; on-chip cloud architecture is achieved through on-chip write-only bus and the interconnection mechanism.P-frame section of AVS encoder is designed independently using the above advantages of on-chip cloud architecture and the corresponding integrated circuit design method, and the three-layer SOA architecture of P-frame encoder is established:analyze the demand layer, acquire the set of system use cases, use case scenarios and atom components; semantic layer defines the application layer language AVS-LL7of AVS encoder P frame part to get a set of semantic processes; service layer achieves atom component set and defines the component data frame format. The on-chip cloud architecture of AVS P frame is achieved by loading the semantic process described with AVS-LL7into the sequencer engine process queue and driving and executing the atom components with the engine. Taking advantage of the high performance, strong flexibility, rich resources and high parallel computing speed, it is adopted to rapidly process P frame complex algorithms of AVS encoder, including modules as motion search, motion estimation, motion compensation, residual/reconstruction, DCT, quantization and entropy coding, inverse quantization, IDCT transformation, loop filter module, etc. Synthesized and simulated through ISE and using100M clock frequency, real-time encoding of AVS encoder P frame under D1resolution is achieved real-timely on Xilinx xc5vlx110t-lff1136FPGA platform.