A Study Of On-chip Cloud Architecture And Application Examples

Service-oriented architecture is one of the mainstream ideologies affectingChina’s IT system construction, and one of the main supporting technology ofcloud computing, Internet of things and software industry development. Thethree layer model of SOA: demand layer, service layer, application layer, aremapped to FPGA through BoW, to build on-chip cloud framework. Through theprocess engine and computing resources, to achieve functional integrated circuit,thereby the on-chip cloud application architecture is established. The semanticprocess and syntax elements can be defined by the user.The article puts forwards three ways to realize on-chip cloud architecture ina case study of genetic algorithm.①On-chip cloud single channel architecture:Genetic algorithm including the fitness value’s calculation, choice, crossoverand variation is encapsulated Atom Component; Sequencer deploys two datastorage units to store individuals of parent and offspring. The individuals, whichare selected randomly from two data storage units, is encapsulated message sentAC; AC receives message and obtains individuals of offspring through GeneticAlgorithm and individuals of offspring which are encapsulated message returnto sequencer; Two ACs and sequencer mount Bow monopolizing the primary node to complete the construction of system through unified node. The time ofdata transmitting system is greater than the operation time of AC whichgenerates many idle cycles to handle two tasks and accommodates morecomputing resources through simulation and verification.②On-chip cloudmany channel architecture: Deploy the exclusive host node BoW for four times,and every host node deploy two AC, next sequencer send messages to four hostsnode simultaneously, also the AC deployed by four host node receive messagesat the same time and calculate, which realize the highly-parallel geneticalgorithm. With the simulation verification, MCA project can make sure thesystem can achieve full-load parallel processing. But deploying host node BoWrepeatedly leads to oversize traffic and sequencer load.③On-chip cloudmemory architecture: In order to decrease the system traffic and sequencer load,it need to load the read-write operation of offspring-parents storage andrandom-sample operation of individual into AC, which lengthen the calculatingtime of AC and decrease the main-line traffic. Sequencer is responsible forpackaging the offspring individuals returned by AC into shared information andsend it back to AC. AC makes the offspring individuals in shared informationstay in offspring-parents storage. MA deploys four ACs which all reservememory structures and parallel processing of offspring’s individuals. Based onMA, on-chip cloud MA-EBoW is designed. MA-EBoW has the least run time,highest genetic rate and occupies moderate resource.By Xilinx XV5VLX110T-1FF1136FPGA development platform, through the verification of genetic algorithm application example, three implementationof on-chip cloud architecture are reliable and efficient. To compare with Matlabsoftware, it speeds up to14778times. On-chip cloud architecture has manyfeatures, such as highly parallel processing, component-oriented principle,coarse-grained, loose coupling, and dynamically re-configurable resources.