Research In Integration Technology Of High-precision Sampling And VGA For Array Sensing Signal Sampling

With the fast development of the space optical remote-sensing camera imagingtechnology, the request for the resolution, power consumption and chip area of the CCDsignal processor. In this thesis a correlated double sampling circuit (CDS) circuit withthe feature of CDS and variable gain amplifier (VGA) is proposed based on the SMIC0.35μm3.3V CMOS process, which saves a lot of power consumption and chip area.The VGA whose gain range varies from0to18dB with the step size of0.035dB isimplemented by capacitor arrays and switch arrays. And its control signal isimplemented by9bits digital programmed signal.This thesis mainly studies the theory of the CDS circuit as well as VGA, and therelated circuit techniques. Firstly, the performance parameters of the sample and holdsystem, the non-ideal effects at the sample phase and the corresponding measures. Theworking principle and the driver timing of the CCD is given, the basic principle of theCDS and three CDS circuit of different structures are studied, a simple circuit modelused for the analysis of the noise performance of the CDS circuit is established. Later,the basic principle of the VGA circuit is studied, some familiar structure of the VGAcircuit is introduced and the design idea of them is summed up. At last, according tothe requirement of the CCD signal processor, a circuit integrated with the feature of theCDS and VGA is designed. The sub-circuit compromises a gain-enhanced telescopicamplifier, common-mode-feedback circuit, clock generator circuit and bootstrappedswitch.Finally the entire whole circuit is simulated through the simulation tool of Cadencespectre based on mixed-signal technology library model of the SMIC0.35μm3.3VCMOS process, the simulation results indicate the noise in the CCD signal is greatlysuppressed and the SNR of the output signal is improved a greatly. When the digitalprogrammed value is000000000, the circuit achieving the lowest SNR of100.25dB andan ENOB of12.94remains meeting the request of the12bits CCD signal processor.Besides, the gain simulation waveform displays a better linearity than the traditionalVGA.