The Design Of14Bit Resistive Divider DAC

Digital-to-analog converters (DACs) are interface circuits between the analogand digital domains. Linear digital-to-analog data converters are key building blocksin a wide range of applications. They are used in, e.g., digital audio applications, datacommunication applications, and other types of applications where conversionbetween analog and digital signal representation is required. Resistive divider isdecided to adjust the frequency pull range, compared with many structures of DACbased on the design requirement which reduced the difficult of design.This work covers bandgap reference with temperature coefficient of16ppm/℃in the range-50to+100℃, LDO, bias circuit and resistance network. Bias circuitadopted self-biased structure and start-up circuit is added for bais circuit and bandgapcircuit to avoid the zero current state. Single stage fold-cascode circuit is used forerror amplifier to improve gain and system stability. Resistive divider allows thelinearity requirements to be met without the need for selection or trimming. The unityresistances with value150ohm are arranged in a serpentine fashion, the MSB decoderselects a line while the LSB decoder picks up an element of the line. The rail-to-railamplifier is used to realize full scale output with unite gain configuration and drivethe next load stage with a full-swing output signal.A14Bit resolution DAC circuit is designed and validated by the software ofCadence in Linux. The output voltage is0-2.5V, the setup time is relatively low, andthe DAC has the monotonic property of output with low glitch. The device is designedand fabricated in a standard charter0.35m four-metal CMOS mixed-signal processwith a single3.3V supply voltage. Layout is drawn and verified via DRC and LVS.The core chip area is about0.47mm×0.7mm and consumes0.5mW, except theoutput amplifier. Simulation results show that the design meets the requirements forSOC application.