The Semi-Analytical Solution Of Ultra Short Channel MOSFET2D Model

High performance, high speed, low power consumption, miniaturization is the development trend in modern integrated circuit, the integrated circuit device size shrinking inevitably makes the device performance in physical effect change. The feature size of device continue to shrink which making MOSFET gate oxide thickness decrease, so the oxide layer capacitance with the narrowing of the device size decreases in proportion. While the gate oxide thickness decreases to a certain extent the gate leakage current will be produced. However, the parasitic capacitance does not decrease with the decrease in proportion to the device size, so the device reliability is more and more serious under the influence of parasitic capacitance and the high k dielectric which has low leakage current and thick physical thickness is widely concerned. In addition, the power limits the device scaling and the increasing chip integration. Reducing the power consumption of the device, not only improves the service life of the integrated circuit, but also reduces the voltage; the two-dimensional effect is also improved. Therefore, either in the digital circuit or in analog circuits the threshold current characteristics becomes the crucial limiting factor. To solve the above problems, a new type MOSFET model getting an accurate solution must be given. It is also the focus and focal point of the present research in microelectronic field.In this paper, the semi-analytical method is presented to solve the two-dimensional MOSFET model. Firstly, two two-dimensional MOSFET models solving gate oxide capacitance and the parasitic capacitance and solving threshold voltage and drain current in the sub-threshold region are established by using rectangular equivalent source. The first model can get the definite solution problem and boundary conditions based on the two-dimensional Laplace equations and obtain the two-dimensional potential distribution through the characteristic function method. Then, the parasitic capacitance analytic expression of the high k gate MOSFET is deduced by Gauss theorem. The second model can get the definite solution problem and boundary conditions based on the two-dimensional Laplace’s equation and Poisson equation. Then, the depletion layer thickness is calculated by the iterative method and threshold voltage and current expression under sub-threshold state about MOSFET is deduced respectively by gauss theorem and least-square method. Lastly, the accuracy value of two-dimensional potential distribution, gate oxide capacitance, parasitic capacitance, depletion layer thickness, the threshold voltage and sub-threshold current is realized by MATLAB programming, the potential distribution obtained and capacitance compared with the results of numerical solution, the accuracy and reliability of sub-threshold current is validated by Medici simulation software. In this article calculated results of the semi-analytical method include the advantages of numerical solution and analytical solution. The general numerical method getting the discrete solution has a computational accuracy, high precision and the large amount of calculation, but the method can not deduce the analytical expression and is not suitable for the circuit simulation. Therefore, it lacks the foresight on electric field distribution. The analytical method can obtain the analytical expression. It can not only describe the physical process and the geometric structure relationship, but also explain electrical characteristics. Even if a few changes come into being in the physical process, it can still predict their electrical properties. But the method is more complex for solving equation and contains a transcendental equation and too many adapted parameters, and its result is not accurate, so it is not suitable for very large scale integrated circuit simulation. The semi-analytical method not only avoids the discretization of numerical equation in numerical analysis and has smaller amount of computations, high precision, minimum occupancy of computer storage and high efficiency, but also provides some analytical expressions which can qualitatively analyze the physical mechanism. Therefore, the method can be extended to other MOSFET structure and be directly used in the device simulation software.