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Study And Simulation Of Two-Dimensional Semi-Analytical Model Of SOI MOSFET Source/Drain Parasitic Resistance

Posted on:2019-05-04Degree:MasterType:Thesis
Country:ChinaCandidate:Y Z WangFull Text:PDF
GTID:2348330545498843Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the progress and development of microelectronic technology,the size of planar MOS device has entered the nano-scale.Smaller device size greatly improves the IC's integration and performance.However,devices' such as parasitic effects,working voltage,etc.can not actually scale according to the law of scaling down,which will greatly affect the performance of the device.In order to reduce the impact of various parasitic effects due to the shrinking of device size,researchers have developed SOI MOSFET devices.SOI MOSFET have many excellent features over common planar MOSFET such as latch-up avoidance,low parasitic effects,low power consumption and ease of integration.Currently,SOI MOSFET are considered as the most suitable devices for very large scale integrated circuits.In-depth analysis of the electrical characteristics of the SOI MOSFET,meaningful for improving the performance of the SOI MOSFET.Due to the small size and short channel of the SOI MOSFET,the parasitic resistance of the source/drain occupies a larger proportion of the total on-resistance,and the in:fluence on the performance of the device can not be ignored.Therefore,to accurately predict the source/drain parasitic resistance of SOI MOSFET device with the change of device structure parameters,to establish a simple,accurate and predictable source/drain parasitic resistance model for the follow-up device research,and circuit design is significant,what has done in this paper is as follows.Firstly,this paper introduces the advantages and disadvantages of planar MOSFET and SOI MOSFET,analyzes the significance and research status of SOI MOSFET source/drain parasitic resistance,and introduces the common research methods of source/drain parasitic resistance,including modeling method and extraction method.This paper introduces analytic method,numerical method and semi-analytical method in the Modeling method and introduces the channel resistance method and some new extraction methods proposed by researchers in recent years in the Extraction method.Secondly,this paper presents a new two-dimensional semi-analytical model according to the characteristics of source/drain regions,the source/drain region is divided into two parts,setting out the solution of the problem and the boundary conditions respectively,setting out the junction conditions of the two districts at the junction.Based on these conditions,the potential distribution and the resistance were determined.Finally,in order to verify the rationality of the proposed model and the correctness of the calculation results,this paper uses the MATLAB PDE tool to solve the source/drain two-dimensional potential distribution to verify the results of the model.After verifying the two-dimensional potential distribution,then verifying the source/drain parasitic resistances,Atlas simulation was used to extract the source/drain parasitic resistance,the resistance and the error between the model and simulation are analyzed and summarized in the form of graphs,the calculation results show that the error between modeling and simulation is very small,the model proposed in this paper has high accuracy,and it can used for characteristic analysis of subsequent devices.
Keywords/Search Tags:SOI MOSFET, semi-analytical method, source/drain resistance, channel resistance method, Atlas
PDF Full Text Request
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