Research And Development Of High-Speed Data Acquisition Card Based On PCI-E Bus

Data acquisition technology plays a crucial role in the field of signal and information processing. With the rapid development of modern industrial production and computer technology, traditional data acquisition devices are difficult to meet the future requirement of high-bandwidth, high-capacity and real-time data processing. However, it is possible to achieve the high-speed data acquisition with the continuous upgrading of bus technology. PCI Express (PCI-E) bus, the third-generation I/O bus technology, is widely used in current data collection devices because of its outstanding performance and ultra-high transmission rate. In general, the simple electronic design automation (EDA) software such as Protel can be employed to implement the design of circuit schematic and printed circuit board (PCB) for the low-channel-count PCI-E bus based data acquisition card. However, with regard to the high-channel-count PCI-E bus based data acquisition card which supports the extremely high signal transmission rate and needs to consider signal integrity issues involving reflection and crosstalk, it is unsuitable to utilize the simple EDA software to perform the PCB design. In this paper, we adopt the more advanced EDA software called Cadence to perform the research and development of8-channel PCI-E bus based high-speed data acquisition card. The entire design flow can be divided into five stages, including schematic design, PCB layout and routing, PCB simulation and optimization, and circuit board debugging.For a start, we carry out the module partition for the whole hardware system, on the basis of which we proceed to select chip and design implementation scheme for each module. After that, we design the schematic for each module according to the data sheet of each chip.In the PCB design stage, the high-speed PCB design method considering the signal integrity issues caused by the signal of high frequency and narrow edge is employed in order to make the circuit board realize the expected function. The improvement of signal integrity can be achieved according to the signal integrity simulation of the high-speed PCB design method. Thus, the high-speed PCB design stage is highly important in the research and development of high-speed data acquisition card. In this stage, we firstly compare the traditional PCB design method and the high-speed PCB design method. Then, depending on the theoretical knowledge of signal reflection and crosstalk which are two main ingredients in signal integrity issues, the actual PCB design on our acquisition card is carried out in term of layering, layout, signal integrity simulation and routing. Based on simulation results, we can get some instructive constraint rules such as matching termination, line spacing, coupling length, static tolerance of differential pairs, which are highly useful for the PCB layout and routing. As a result, PCB design, the most important stage in the research and development of data acquisition card, can be completed under the premise of good signal quality.Next, we test the basic function of the developed data acquisition card, which includes power supply test and FPGA test. Finally, this paper summarizes the whole research and development process of the acquisition card, and points out some places that should be improved and perfected in the future.