Research Of Three-channel Single-wire Transmission LED Driver Integrated Circuit

With the development of semiconductor and new energy saving technology, theproducts light emitting diode (LED) emerge, which have a high luminous efficiency,long service life, high safety and environmental protection. A large number ofhigh-performance LED chips are studied also. In recent years,, with the development ofthe display industry, the market demand for various types of LED and its driver circuitgreatly increases. Currently, the large LED display systems often use a variety of busprotocol to achieve signal transmission. However, the problems such as the actualtransmission line impedance mismatch, the external electromagnetic interference (EMI),make the signal deformation in the transmission process, lead to transmission failure,and then make the entire LED system paralysis.In view of the above problems, this paper designs a kind of LED driving circuit. Itcan realize the transmission in the LED chip signal cascade, inner integration with clockrecovery circuit, bandgap reference circuit, PWM clock correction circuit and so on.Single line transmission reduces the signaling cascade width, strengthens the ability toresist temporal interference in the transmission process, so that the number of cascade ofthis chip is not limited by signal transmission. The main content and results of thispaper are summarized as follows:1. Bandgap reference circuit and steady current circuit: This paper through the twoseries base-emitter voltage and high-performance op-amp obtains bandgap referencecircuit, the temperature coefficient of which is13.28ppm, and by the addition betweenPTAT current produced by the band gap reference and certain proportion of triodenegative temperature coefficient current gets a steady current circuit, the temperaturecoefficient of which is118.6ppm.2. Voltage clamp circuit: Through a resistor divider and a comparator to control thehigh supply voltage, the chip stable voltage limits at5.4V.3. Two oscillation circuit and clock recovery module: This paper designs a2.165MHz oscillation circuit by using a constant voltage and current, and a clockrecovery module consisting of another numerically controlled oscillator (NCO) and the digital frequency discriminator (DFD), which can be extracted from the data clockbetween400kHz and800kHz.4. PWM clock correction circuit and LED driver module: Due to the differentphysical luminance corresponding to different lightness response rate, the PWM clockcorrection circuit controls PWM pulse width to correct the difference. Data obtained bydata acquisition module is the three group8-bit grayscale data to control the level of theR, G and B respectively. The LEDs of each channel achieve256-level gray scaleadjustment.5. The overall simulation and layout: The chip can achieve good performancerequirements through simulation, and the overall layout area is0.58x0.75mm2.