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Research And Design Of Audio Clock Recovery Circuit

Posted on:2018-07-21Degree:MasterType:Thesis
Country:ChinaCandidate:C M LiangFull Text:PDF
GTID:2348330515991015Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of digital technology,under the technical requirements of highspeed transmission and large amount of data,high-definition multimedia transmission technology has become the force of research and development in current consumer electronics industry.A variety of digital transmission interface began to appear in people's daily lives.High-definition multimedia interface became one of main representatives of modern digital interface to transmit high-definition video.Based on the HDMI protocol,this paper studies the problem of audio clock recovery.HDMI audio clock recovery contains two aspects: one is transmission of parameter N and CTS,the other is frequency synthesis.In the transmission of parameters N and CTS,compared to data transmission mode of two typical protocol—HDMI 1.4b and HDMI 2.0 version.In data transmission channel design,data scrambling is added,while ensuring the compatibility of HDMI interface.HDMI transmitter includes extracting parameter CTS,packing parameter N and CTS,video data processing,data scrambling and data encoding.HDMI receiver includes data synchronization,data decoding,data descrambling,video data processing,packet extraction and packet unpacking.In the frequency synthesis,mixed frequency synthesis method of PLL excitation DDS is used in HDMI system.Fixed high-frequency signal of PLL's output is divided by DDS,according to different control signals to get different frequency clock.In this paper,DDS structure of multiphase clock input is used,and the relationship between DDS output frequency and PLL output frequency is deduced.According to the above,the mapping relationship between DDS control signals and the parameter N,CTS from audio clock recovery packet in HDMI receiver is determined,and the frequency output of DDS is controlled to complete audio clock recovery.The data transmission path is designed by Verilog HDL and verified by NC-Verilog.The DDS design includes digital and analog part and uses a hybrid verification method.The simulation results show that the data transmission path can transmit data correctly,and DDS can recover the audio clock.
Keywords/Search Tags:HDMI, Audio clock recovery, Data transmission path, Frequency synthesis
PDF Full Text Request
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