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Optimization And Design Of The Key Blocks In EEPROM IP

Posted on:2014-10-07Degree:MasterType:Thesis
Country:ChinaCandidate:K LiuFull Text:PDF
GTID:2268330401452839Subject:Software engineering
Abstract/Summary:PDF Full Text Request
As EEPROM has high reliability and low power consumption, it is widely used inpeople’s livelihood projects such as RFID, authentication,bank cards, social securitycards and so on to store data in contactless smart card. When applied in non-contactsystem such as bank cards, social security card and electronic passport, it is needed torequire more on the chip size and power consumption of EEPROM, which the present0.35um EEPROM process can not meet. So it is important to develop an EEPROM IPwith smaller size and lower power consumption.This paper uses SMIC0.18um process EEPROM technology to research anddevelop Level Shift and Sensen Amplifier,which are used in EEPROM IP, to redusepower consumption. Based on convitional Level Shift, this paper analysis in-depth thespeed and consumption of Bootstrap Level Shift and came up with a new six transistorLevel Shift. After compared with two kinds of single-ended senser and conventional onein the speed and consumption, there came up with a new latched senser.Both the designed Level Shift and Sensen Amplifier can satisfy our need with lowpower consumption and high speed. And they are more suitable for non-contact smartcard to storage information. The simulation shows that the designs meet the requirementand have achieved the goal.
Keywords/Search Tags:Non-Volatile Memory, EEPROM, Level Shift, Sense Amplifier
PDF Full Text Request
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