Small And Medium-sized Embedded EEPROM IP Design

In the21st century, the type of portable electronic products is gettingincreasing, so that the new sorts of semiconductor memory appear constantly. Thenon-volatile memory technology has become the mainstream. This kind of memoryis adapted to the new development of the time and it is more advanced thanprevious ones. EEPROM memory can be one of the representatives. EEPROMgeneration has already move the high voltage generator from outside of the chipinto inside so that the chip only need signal power supply. Because of itsconvenience, EEPROM is applied in the embedded IC card market andcommunication system widely.The paper mainly designs a complete small and medium-sized EEPROM IP,first studies the work principle of the EEPROM, completes research of some keytechnology such as reference voltage source, charge pump, sensitive amplifier andEEPROM cell, uses Cadence Virtuoso software to complete design and simulationof these modules: EEPROM memory array, row address decoding, column addressdecoding, timing circuit, data and address register, high voltage generate circuit,sensitive amplifier.This paper uses top-down design, combines with several years’ experience inthe analog and digital circuit design of the laboratory, completes the design of a1Kb EEPROM IP in circuit level, and designs the physical layouts of some keymodules. These designs use CSMC0.5μm CMOS technique. The high voltagegenerate circuit can produce a steady20V voltage which has a rise time of about220μs, this makes the circuit to reach the high voltage quickly.