Research And Hardware Design Of Image Processing Algorithms Based On FPGA

With the fast development of electronic technology, real-time image processing is widely used in the field such as multimedia and image communication. FPGA now has became an ideal choice of hardware in real-time image processing, while the research about the implementation of digital image algorithms based on FPGA will be the new key-point in information industry.This thesis consists of designing and implementing of digital image algorithms such as median filter, rank order filter, morphological operators, convolution and gaussian filter using FPGA in standard hardware description language VHDL. Through improving algorithms and optimizing structures, with conditions of efficiently using of hardware resource, the utility of the parallel algorithm is exploited more efficiently in the design. With pipeline optimization algorithm, the speed of top module dealing with images is largely improved. In the design of median filter, improved algorithm called fast median filter is given, this new algorithm can save more resource of FPGA and the speed is accelerated, In the design of morphological operators, the thesis presents two improved algorithms of maximum filter and minimum filter, both will use less hardware resource used for these two algorithms and fit to the pipeline structure, so the time of dealing with an image is shorter.The full design of each module are synthesized and simulated on Quartus II of Altera Corp and Modelsim. The result of synthesis and simulation indicate that the design of image processing algorithm based of FPGA can not only achieve a good processed result and get a high frequency, but also it can give a better performance of speed than using software and suit for real-time image processing.This thesis investigates the design technologies of specific chip for image processing using FPGA and provides preliminary study for the real-time image processing system based on FPGA.