Font Size: a A A

Real-time Image Processing System Based On Fpga Design And Realization

Posted on:2009-07-12Degree:MasterType:Thesis
Country:ChinaCandidate:K J LiuFull Text:PDF
GTID:2208330332976572Subject:Physical Electronics
Abstract/Summary:PDF Full Text Request
Machine vision systems, with the features of non-contact, strong anti-interference, real-time, flexibility and accuracy,and other characteristics, are widely used in the fields of target identification, target tracking, industry detectionand and so on. In the paper, in order to resolve the current detection equipment and systems deficiencies. The use of existing technologies to build a new kind of visual inspection systems has significant research and practical purpose, as well as a great prospect.In the thesis,, analyzing the image processing algorithm which is appropriate for the visual inspection influences the real-time system's performance. In order to solve the problem of dealing with real-time, one methed of parallel processing was given, which means image detection processing with parallel processing devices. As the computing and signal processing unit is the core of system, the amount of computing is very laborious, the traditional methods can not meet the real-time requirements. The structure and working methods on the field programmable logic array (FPGA) devices was analyzed, the use of FPGA for signal processing and computing, so that the FPGA has the advantages in speed and resources in the exigent real-time situation.The use of advanced FPGA development tool System Generator for image processing algorithm for the system-level modeling and simulation, which automatic generate the requested documents for the realization of hardware and eliminiate the heavy work on the compile and modify the VHDL (Verilog) code, improve the efficiency of development and reduce the development cycle.According to the development environment and image processing board system features, functions are gotten a reasonable division of hardware and software, so that the communication and process between the PC and the target system was completed. For the core of the system (pre-image), in the FPGA design, a pre-filter in the fast edge detection and hardware circuit were accomplished. Pipeline technology and parallel processing techniques applied to the circuit design to increase the processing speed, saving hardware resources. Finally, one simple control software in the PC was designed,which validated the pre-processing circuit and realized the associated debug between the PC and the target system. The results show that the FPGA-based hardware image processing algorithm circuit to meet the system requirements and speed, achieving the desired results,which has a good parctical reference value.In this paper, the exploration and attempt on the high-speed digital signal processing's that is design by using the high-performance FPGA development tools, System Generator, were have been done, which has an effect on the completion of rapid real-time signal processing by the FPGA in the furure.
Keywords/Search Tags:Machine vision, FPGA, VHDL, System Generator, Fast Median Filtering, Edge Detection, pipeline, parallel processing, Anaconda-CL, upper computer, lower computer
PDF Full Text Request
Related items