In-System Logic Analyzer Circuit Design And Realization

In this paper, the debugging theories and methods for logic design of Sram-basedFPGAs were researched deeply, with an example of Xilinx Sram-based FPGAs. In thefirst part, the feature of the architectures and developing flow of Sram-based FPGAswere introduced, especially the debugging theories and methods for modern FPGAlogic designs. Traditionally, we usually used some softwares to simulate our logicdesigns first, then programmed the bitstream into the FPGA on the PCB, andmonitored them with an oscilloscope or a logic analyzer. Software-simulating was veryuseful in the early FPGA designs. But, as the increasing of the scale of the logicdesigns, the time cost of software-simulating was increasing. In the same time, with thedevelopment of package technology, lots of signals especial the internal signals canhardly be monitored with a traditional logic analyzer, and the cost of debugging isincreasing. So, the debugging theory of using an in-system embedded logic analyzerwas introduced emphatically in this paper. The in-system logic analyzer is thecombination of JTAG technology, embedded technology and logic analysis technology.It can be embedded into an FPGA design as an IP core, and can monitor all internalsignals without connectors. ChipScope Pro from Xilinx Inc and SignalTap II fromAltera Inc are both belong to this kind of in-system logic analyzer. A major motivationfor this paper is to realize an effective and free in-system logic analyzer independentfrom any FPGA platform. It can be used in any FPGA, even the designs of ASICs andSOCs.The outline of this thesis:1. First, the international research trends and development in China of FPGAdebugging technology are introduced;2. The architecture of SRAM-based FPGA and its develop flow are introduced.The debugging work is very important in the flow.3. The whole design process and result of an in-system logic analyzer are given.4. In the last part, some results of testing in-system logic analyzer are given.