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High-speed Logic Analyzer Hardware System Design

Posted on:2003-03-14Degree:MasterType:Thesis
Country:ChinaCandidate:Z J DaiFull Text:PDF
GTID:2208360065451008Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Logic analyzer is one of the most important data domain test instruments. Following the development of digital techniques and computer techniques, logic analyzer has a widespread application and gets a rapid development. This paper is the summary of my graduate topic "design of 400MSa/s logic analyzer hardware". The design of the hardware of a high speed logic analyzer (ES4541) and it's drive software is discussed in the paper. It also introduces the test methodology of ES4541 logic analyzer and test results.The first chapter is a introduction. It describes the basic feature of digital system and logic analyzer's application in data domain test. It introduces the work of this topic. This chapter also describes the basic theory of sampling with different phase technology. Chapter 2 describes the design of the hardware architecture of a high speed virtual logic analyzer, the interface between the embedded computer and the data acquisition and control board. This part also discusses the design of data channels and theory of trigger. In the last it introduces the theory of probe.Chapter 3 discusses the design of data acquisition and storage circuit. It discusses the design of the high speed data channels, clock circuit and glitch distinguishing circuit. Chapter 4 describes the design of trigger and storing control circuits. It introduces the theory of trigger and tracing, discusses the design of trigger word distinguished circuit, trigger and storing control circuit. Chapter 5 describes the realizing of control circuits in CPLD. This section discusses the procedure that use graphics and AHDL to design clock circuit, decode circuit, trigger word distinguished circuit, limit word distinguished circuit, trigger and storage control circuit and counters circuit.Chapter 6 describes the drive software of data acquisition and control board. It discusses the design of self checking program, data acquisition and control program, data read and processing program. Chapter 7 introduces the adjustment of circuit, the problems find in adjustment and it's solve methods. Chapter 8 introduces the test methodology of this logic analyzer, and gives the test results. The last chapter is the conclusion. It introduces the performances of this logic analyzer and developing trend of logic analyzer in future.
Keywords/Search Tags:logic analyzer, data domain test, data acquisition, sampling with different phase, trigger
PDF Full Text Request
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