Design Of System Software Of Embedded Logic Analyzer Based On Niosâ…¡

Logic analyzer is quite important in the high speed hardware logic test and software state analysis. But, at present, the price of table model logic analyzer is quite expensive. According to this, this paper introduces a new design scheme for the embedded logic analyzer based on Niosâ…¡. Niosâ…¡is a type of softcore CPU which bases on the development of FPGA. Niosâ…¡has the characteristic of reconfiguration, which brings more flexibility to the designer. We can say that Niosâ…¡has offered a kind of brand-new train of thought to Embedded System designer. This design applies the scheme of hardware platform based on Niosâ…¡to the embedded logic analyzer, and the overview of Niosâ…¡based on chip Cyclone is given.Firstly, the principle of logic analyzer is addressed in this paper. The advantages and technical target of the embedded logic analyzer are introduced too. Secondly, this paper analyzes the structure and mechanism of the Niosâ…¡Softcore CPU, in addition, analyzes the Avalon bus. Thirdly, it introduces the whole hardware design in the embedded logic analyzer. Fourthly, it introduces the flow of the software development, emphasizing on the communication among the Niosâ…¡CPU, the keyboard, the LCD and the logic circuit in the FPGA. In the end of the paper, a summary is presented and some suggestions are forward to improve the instrument.