Infrared Focal Plane On-chip Integration Column Parallel Structure ∑ Delta Adc Technology Research

Infrared (IR) detection imaging technology has been developed for various applications such as military search and track, medical examination, astronomy and commercial products. Infrared focal plane array(IR FPA) imaging will be developed to be larger arrays, higher performance, higher integration level and smarter FPA, which greatly challenge readout integrated circuit(ROIC). As an especially important part of FPA readout circuit, analog to digital converter (ADC) directly impact the signal to noise ratio and readout rate of the whole IR FPA imaging system. Therefore, ADC of high performance plays a critical role in IR imaging systems.Based on analysis and compare between several ADC options, the implementation of Sigma-Delta ADC under FPA column parallel structure is explored in this research. Beginning with the basic theory of Sigma-Delta ADC, this thesis presents the design method of Sigma-Delta ADC and incremental Sigma-Delta ADC for FPA column parallel structure. By using Simulink tool in matlab, system level verification and nonideality analysis are performed. With respect to the requirement of small area and power consumption, integrator based on inverter instead of OTA is realized. Finally, the circuit implementation of each block is discussed in detail and the simulation results are described.An incremental Sigma-Delta ADC, which is implemented in a0.18μm standard CMOS process, is presented for IR FPA column parallel structure. The circuit operates at a sampling frequency of30MHz. The simulation shows that signal-to-noise-and-distortion ratio (SNDR) achieves80.6dB at the requirement of250conversion clock cycles, and the power dissipation is103.7uW@VDD=1.8V.